After being down with a nasty bug for few days nothing much has been done on the mcHF Pro front, except doing small CPU pin allocations daily.
To continue the minimalist tradition of the mcHF i decided to reserve the MCO1 and MCO2 pins for clocking out external HW. For those who don’t know, the internal CPU PLL can be routed to two GPIOs and get away without two extra oscillators. Final result is reduced cost and better frequency stability (lower drift), as it is easy to oven/stabilize one chip than three.
The mcHF used only one of those, so only the Codec was clocked from the CPU PLL. On the new design i can clock the Codec again and something else. Still no idea, need to carefully check the frequency range that could be used – but maybe the quadrature upconverter or the FPGA.
For those who would like a peek at the preliminary schematics and the FPGA code, i did setup the GitHub, here.